Yoonjin Kim and Haelim Jung, "Reconfigurable Hardware Architecture for Faster Descriptor Extraction in SURF," IET Electronics Letters, vol. 54, no. 4, pp. 210-212, February 2018 [SCI].


Yoonjin Kim, Hyejin Joo and So Hyun Yoon, "Inter-CGRA Reconfiguration Technique for Efficient Pipelining of Kernel Stream on CGRA-based Multi-Core Architecture," Special Issue of IET Circuits, Devices & Systems, vol. 10, no. 4, pp. 251-265, July 2016 [SCI].


Yoonjin Kim and Seungyeon Sohn, "Dynamic Redundancy-based Fault-Recovery Scheme for Reliable CGRA-based Multi-Core Architecture," Journal of Semiconductor Technology and Science , vol. 15, no. 6, pp. 615-628, December 2015 [SCIE].


Yoonjin Kim and Seungyeon Sohn, "Efficient Fault-Recovery Technique for CGRA-based Multi-Core Architecture," Journal of Semiconductor Technology and Science , vol. 15, no. 2, pp. 307-311, April 2015 [SCIE].


Yoonjin Kim and Heesun Kim, "Energy-Efficient and High Performance CGRA-based Multi-Core Architecture" Journal of Semiconductor Technology and Science , vol. 14, no. 3, pp. 284-299, June 2014 [SCIE].


Heesun Kim, Seungyeon Sohn and Yoonjin Kim, "Ring-based Sharing Fabric for Efficient Pipelining of Kernel-Stream on CGRA-based Multi-Core Architecture," in Proc. IEEE International Symposium on Quality Electronic Design (ISQED), pp. 276-283, March 2014 (Acceptance rate 29%).


Yoonjin Kim, "Power-Efficient Configuration Cache Structure for Coarse-Grained Reconfigurable Architecture," Journal of Circuits, Systems and Computers, vol. 22, no. 3, pp. 1-27, March 2013 [SCIE].


Yoonjin Kim, "Hierarchical Multiplexing Interconnection Structure for Fault-Tolerant Reconfigurable Chip Multiprocessor," Journal of Semiconductor Technology and Science , vol. 11, no. 4, pp. 318-328, December 2011 [SCIE].


Yoonjin Kim, "Reconfigurable Multi-Array Architecture for Low-Power and High-Speed Embedded Systems," Journal of Semiconductor Technology and Science, vol. 11, no. 3, pp. 217-220, September 2011 [SCIE].


Yoonjin Kim and Rabi N. Mahapatra, "Design of Low Power Coarse-Grained Reconfigurable Architecture," CRC Press, Taylor and Francis Group, December 2010.

 


Yoonjin Kim, Rabi N. Mahapatra and Kiyoung Choi, "Design Space Exploration for Efficient Resource Utilization in Coarse-Grained Reconfigurable Architecture," IEEE Transactions on Very Large Scale Integration systems, vol. 18, no. 10, pp. 1471-1482, October 2010 [SCIE].


Yoonjin Kim and Rabi N. Mahapatra, "Dynamic Context Compression for Low Power Coarse-Grained Reconfigurable Architecture," IEEE Transactions on Very Large Scale Integration systems,  vol. 18, no. 1, pp. 15-28, January 2010 [SCIE].


Yoonjin Kim and Rabi N. Mahapatra, "Hierarchical Reconfigurable Computing Arrays For Efficient CGRA-based Embedded Systems," in Proc. IEEE/ACM Design Automation Conference (DAC), pp. 826-831, July 2009 (Acceptance rate 22%).



Yoonjin Kim, Rabi N. Mahapatra, Ilhyun Park and Kiyoung Choi, "Low Power Reconfiguration Technique for Coarse-Grained Reconfigurable Architecture," IEEE Transactions on Very Large Scale Integration systems,  vol. 17, no. 5, pp. 593-603, May 2009 [SCIE].


Yoonjin Kim and Rabi N. Mahapatra, "Dynamic Context Management for Low Power Coarse-Grained Reconfigurable Architecture," in Proc. the 19th IEEE/ACM Great Lake Symposium on VLSI (GLSVLSI), pp. 33-38, May 2009 (Acceptance rate 16%).


Yoonjin Kim and Rabi N. Mahapatra, "A New Array Fabric for Coarse-Grained Reconfigurable Architecture," in Proc. IEEE EuroMicro Conference on Digital System Design (EuroMicro DSD), pp. 584-591, September 2008 (Acceptance rate 27%).


Yoonjin Kim and Rabi N. Mahapatra, "Reusable Context Pipelining for Low Power Coarse-Grained Reconfigurable Architecture," in Proc. IEEE/ACM International Parallel & Distributed Processing Symposium (IPDPS), pp. 1-8, April 2008 (Acceptance rate 26%).


Ilhyun Park, Yoonjin Kim, Manhee Jo and Kiyoung Choi, "Chip Implementation of Power Conscious Configuration Cache for Coarse-Grained Reconfigurable Architecture," in Proc. the 15th Korean Conference on Semiconductors, pp. 527-528, February 2008.


Yoonjin Kim and Rabi N. Mahapatra, "Dynamically Compressible Context Architecture for Low Power Coarse-Grained Reconfigurable Array," in Proc. IEEE International Conference on Computer Design (ICCD), pp. 395-400, October 2007 (Acceptance rate 21%).


Ilhyun Park, Yoonjin Kim, Chulsoo Park, Jeoongki Son, Manhee Jo and Kiyoung Choi, "Chip Implementation of a Coarse-Grained Reconfigurable Architecture," in Proc. IEEE International SoC Design Conference (ISOCC), pp. 628-629, October 2006.


Yoonjin Kim, Ilhyun Park, Kiyoung Choi and Yunheung Paek, "Power-Conscious Configuration Cache Structure and Code Mapping for Coarse-Grained Reconfigurable Architecture,"  in Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 310-315, October 2006 (Acceptance rate 26%).


Chulsoo Park, Yoonjin Kim and Kiyoung Choi, "Domain-Specific Optimization of Reconfigurable Array  Architecture," in Proc. US-Korea Conference on Science, Technology, & Entrepreneurship, August 2005.


Yoonjin Kim, Mary Kiemb and Kiyoung Choi, "Efficient Design Space Exploration for Domain-Specific Optimization of Coarse-Grained Reconfigurable Architecture," in Proc. SoC Design Conference sponsored by The Institute of Electronics Engineers of KOREA (IEEK), pp. 19-24, May 2005, IEEE SSCS/EDS Seoul Chapter Paper Award.


Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jung and Kiyoung Choi, "Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization", in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE), pp. 12-17, March 2005 (Acceptance rate 21%).

Contact

 

Address: Room #411B, Myungshin Building, Sookmyung Women's University, Cheongpa-ro 47-gil 100 (Cheongpa-Dong 2-Ka), Yongsan-gu, Seoul 04310, South Korea [04310 서울특별시 용산구 청파로 47 100 (청파동 2) 숙명여자대학교 명신관 411B].

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